Semiconductor memory devices contain memory cells for storing small electrical charges representative of bits of data. As storage densities are increasing, the cells, and circuitry used to access, sense and restore bits stored in the cells are becoming smaller and smaller. Sense amplifiers are used to detect and amplify the charges stored in the cells. As the size of the memory devices decrease, the charge to be detected decreases. In addition, the power supply voltages at which DRAMs operate are also decreasing to reduce the power consumption of the DRAMs. The lower power supply voltages, lead to slower circuit operations, or in some cases where transistors have relatively high threshold voltages, improper operation.
Isolation gates are used to connect digit lines coupled to multiple memory cells to sense amplifiers. In normal operation, the isolation gates selectively turned on and off during read, sense and restore cycles. First, the isolation gates are coupled to the power supply Vcc during initially accessing charges from a memory cell. In most cases, they are left on during sensing, but sometimes they have been turned off by coupling the gates to ground during sensing. Finally, the isolation gates are coupled to Vcc during restore to turn them back on. As Vcc decreases, the threshold voltage, Vt, of the isolation gates becomes relatively large, and affects the ability of the sense amplifiers to sense the charge stored on the cells. The threshold voltage is not easily scalable. Further, high Vt relative to Vcc can affect the ability to restore the sensed cell due to significant resistance presented by the isolation gate. Some prior attempts to solve this problem on restore resulted in a pumped Vcc, Vccp, being applied to the isolation gates to reduce this resistance as seen in an IEEE paper entitled "Low Voltage High Speed Circuit Designs for Giga-bit DRAMs" by Lee et al., Symposium on VLSI Circuits Digest of Technical Papers, 1996, pp 104,105.
There is a need for accurate reading of memory cells in DRAM devices. There is a further need for better detection of voltage differences on digit lines during access operations, especially when the supply voltage of the DRAM is decreased. There is yet a further need for faster accessing, sensing and restoring of memory cells in DRAM devices.